What is Silicon Wafer?

What is silicon wafer

Silicon wafer is an important material for making integrated circuits. Various semiconductor devices can be made by means of photolithography and ion implantation on silicon wafers.

Chips made of silicon have amazing computing power. The development of science and technology continues to promote the development of semiconductors. The development of technologies such as automation and computers has reduced the cost of high-tech products such as silicon chips (integrated circuits) to a very low level. This has allowed silicon wafers to be widely used in aerospace, industry, agriculture and defense, and even sneak into every home.

The content of silicon in the earth's crust reaches 25.8%, which provides an inexhaustible source for the production of single crystal silicon. Since silicon is one of the most abundant elements in the earth's crust, the advantage of reserves is also one of the reasons why silicon has become the main material for photovoltaics for products such as solar cells that are destined to enter the mass market.

What are silicon wafers used for

Silicon wafers are the raw material for making transistors and integrated circuits. Generally, it is a slice of single crystal silicon. Silicon wafer is an important material for making integrated circuits. Various semiconductor devices can be made by means of photolithography and ion implantation on silicon wafers. Chips made of silicon have amazing computing power. The development of science and technology continues to promote the development of semiconductors.

Silicon is a chemical element, its chemical symbol is Si, formerly known as silicon. The atomic number is 14, the relative atomic mass is 28.09, there are two kinds of allotropes, amorphous and crystalline, and allotropes include amorphous silicon and crystalline silicon. A metalloid element belonging to group IVA on the periodic table. High-purity silicon is extracted from quartz. Taking monocrystalline silicon as an example, the extraction must go through the following processes: quartz sand—metallurgical grade silicon—purification and refining—deposition of polycrystalline silicon ingots—monocrystalline silicon—silicon wafer cutting.

Silicon wafer production process

 The wafer preparation process starts with a silicon single crystal ingot and ends with a clean polished wafer for use in an excellent environment. During this period, many processes and cleaning steps are required to process from a single crystal silicon rod to several silicon wafers that can meet special requirements. Apart from the many process steps, the entire process is almost always carried out in a dust-free environment. Wafer processing begins in a relatively dirty environment and ends in a Class 10 clean room.

Process overview

The silicon wafer processing process includes many steps. All steps fall into three main categories: can modify physical properties such as size, shape, flatness, or properties of some bulk material; can reduce the amount of undesired surface damage; or can eliminate surface contamination and particles. The main steps of silicon wafer processing are shown in the typical flow of Table 1.1. The order of the process steps is important because the determination of these steps allows the wafer to suffer as little damage as possible and to reduce contamination of the wafer. In the following chapters, each step will be described in detail.

Silicon wafer processing steps

1. Slicing

2. Laser marking

3. Chamfer

4. Grinding

5. Corrosion

6. Back Injuries

7. Edge mirror polishing

8. Preheat cleaning

9. Resistance Stabilization - Annealing

10. Back Seal

11. Adhesive sheet

12. Polishing

13. Cleaning before inspection

14. Visual inspection

15. Metal cleaning

16. Wipe

17. Laser Inspection

18. Packaging/Shipping

Slice (class 500k)

In the introduction of silicon wafer processing, the first step from the single crystal silicon rod is slicing. The key to this step is how to reduce the loss as much as possible when processing the single-crystal silicon rods into silicon wafers, that is, it is required to process as many single-crystal silicon rods into useful silicon wafers as possible. In order to get the best possible silicon wafers, the silicon wafers require a minimum amount of warpage and a minimum amount of kerf loss. The dicing process defines the flatness that can be substantially suitable for device fabrication.

There are two main ways of slicing - inner circle cutting and wire cutting. These two forms of dicing are used because they minimize material loss, damage the wafer, and allow the wafer to warp the least.

Slicing is a relatively dirty process, which can be described as a grinding process, which produces a large number of particles and a large amount of very shallow surface damage.

After the silicon wafer is cut, the bonded carbon board and the adhesive used to bond the carbon board must be removed from the silicon wafer. During this cleaning and cleaning process, it is important to maintain the order of the wafers, as they have not yet been identified.

Laser Marking (Class 500k)

After the ingot is cut into individual wafers, the wafers are marked with a laser. A high-power laser printer is used to inscribe the logo on the surface of the silicon wafer. The wafers are coded in the same order as they were cut from the ingot, so the correct location of the wafers is known. This code should be uniform and used to identify the silicon wafer and know its origin. The code can indicate from which single crystal ingot and where the wafer was cut. It is important to maintain this traceability because the overall properties of a single crystal can vary from one end of the ingot to the other. The numbers need to be etched deep enough to remain after the final wafer is polished. Once the code is engraved on the silicon wafer, even if the silicon wafer has omissions, it can be traced back to the original location, and if the trend is clear, then the correct action can be taken. Laser marking can be on the front or back of the silicon wafer, although the front is usually used.

chamfer

When the slicing is completed, the silicon wafer has a sharp edge, which needs to be chamfered to form a bullet-like smooth edge. The chamfered wafer edge has low center stress, thus making it stronger. The strengthening of the edge of the silicon wafer can reduce the degree of fragmentation of the silicon wafer in the subsequent processing of the silicon wafer. Figure 1.1 illustrates the process of sectioning, laser marking and chamfering.

Grinding disc (Class 500k)

The next steps are to remove the different damages generated during the slicing process and laser marking, which are done during the grinding process. During grinding, silicon wafers are placed on a carrier and placed around some grinding discs. Both sides of the silicon wafer can be in contact with the grinding disc, so that both sides of the silicon wafer can be ground at the same time. The grinding discs are cast iron with serrated edges. The upper disc has a series of holes that allow abrasive sand to be distributed over the wafer and moved with the grinder. Grinding can remove serious damage caused by slicing, leaving only some even and shallow scars; the second benefit of grinding is that after grinding, the silicon wafer is very flat, because the grinding disc is extremely flat.

The grinding process is mainly a mechanical process, and the grinding disc presses the grinding sand on the surface of the silicon wafer. Grinding sand is composed of fine particles formed by delayed calcination of an alumina solution, which grinds away the outer layer of silicon. The outer layers are ground to a greater depth than the damage caused by slicing.

Corrosion (Class 100k)

After grinding the wafer, there is still a certain amount of balanced damage on the surface of the silicon wafer. These damages should be removed, but the additional damage should be caused as little as possible. More distinctive is the use of chemical methods. There are two basic etching methods: alkali etching and acid etching. Both methods were applied to dissolve the damaged portion of the wafer surface.

Back Injury (Class 100k)

Mechanical damage is performed on the backside of the wafer to form metal gettering centers. When the silicon wafer reaches a certain temperature, metal atoms such as Fe, Ni, Cr, Zn, etc., which will reduce the carrier lifetime, will move in the silicon body. When these atoms encounter a damage point on the backside of the silicon wafer, they are trapped and instinctively move from the inside to the damage point. Introduction of back injuries is typically by impact or abrasion. For example, the impact method uses sandblasting, and the abrasion method uses a brush to rub the surface of the silicon wafer. Other damage methods include depositing a layer of polysilicon and creating a chemically grown layer.

edge polishing

The purpose of wafer edge polishing is to remove the remaining etch pits on the wafer edge. When the edge of the silicon wafer becomes smooth, the stress on the edge of the silicon wafer also becomes uniform. The uniform distribution of stress makes the silicon wafer stronger. Polished edges minimize the adsorption of particulate dust. The polishing method of the edge of the silicon wafer is similar to the polishing of the surface of the silicon wafer. The silicon wafer is sucked by a vacuum suction head and rotated in a rotating barrel at a certain angle without hindering the vertical rotation of the barrel. The barrel has a polishing pad and through which the mortar flows, a chemical/mechanical polishing method is used to remove the etch pits from the edge of the silicon wafer. Another method is to acid etch only the edge of the silicon wafer.

Preheat cleaning (Class 1k)

Before the silicon wafer enters the resistance stabilization process, it needs to be cleaned to remove the organic matter and metal contamination. If there is metal remaining on the surface of the silicon wafer, when it enters the resistance stabilization process and the temperature rises, it will enter the silicon body. The cleaning process here is to immerse the silicon wafer in a cleaning solution (H2SO4+H2O2) that can remove organics and oxides. Many metals will dissolve in the chemical cleaning solution in the form of oxides; The oxide layer on the wafer surface dissolves to remove contamination.

Resistance to Stabilization - Annealed (Class 1k)

Silicon wafers are grown in a high-concentration oxygen atmosphere in a CZ furnace. Because most of the oxygen is inert, there are still a few oxygen that can form small groups. These groups can act as n-donors, which can make the resistivity measurements of the silicon wafers incorrect. To prevent this from happening, the silicon wafer must first be heated to around 650°C. This high temperature causes oxygen to form large groups without affecting the resistivity. The wafer is then quenched to hinder the formation of small oxygen groups. This process can effectively eliminate oxygen as an n-donor and stabilize the true resistivity.

Back Seal (Class 10k)

For heavily doped silicon wafers, there is a high temperature stage where a thin film is deposited on the backside of the silicon wafer to prevent the outdiffusion of dopants. This layer acts as a sealant to prevent dopant escape. There are usually three types of thin films used as back seal materials: silicon dioxide (SiO2), silicon nitride (Si3N4), and polysilicon. If oxide or nitride is used for back sealing, it can be strictly regarded as an encapsulant, while if polysilicon is used, in addition to being mainly used as an encapsulant, it also acts as an external getter.

Bonding (Class 10k) Before the silicon wafer goes into polishing, it must be bonded first. The bonding wafer must ensure that the silicon wafer can be polished flat. There are two main types of sticking, wax sticking or stencil sticking.

As the name suggests, wax stickers use a solid rosin wax to bond to the silicon wafer and provide an extremely flat reference surface? . This surface provides a solid reference plane for polishing. The sticky wax prevents the wafer from moving when it is polished under a carrier on one side. Wax-bonded wafers are only useful for single-sided polished silicon wafers.

Another method is template sticking, which has two different variants. One is only suitable for single-sided polishing. In this method, the silicon wafer is fixed on a circular template and placed on a soft pad. This pad provides enough friction so that during polishing, the edge of the wafer is not fully supported against the side carrier, and the wafer is not in hard contact, but "floats" on the object. When the front side is polished, the single-sided sticky pad protects the back side of the silicon wafer. Another method is suitable for polishing on both sides. In this method, the upper and lower sides of the template on which the silicon wafer is placed are open, and the template with both sides open is usually called a carrier. This method allows both sides to be polished simultaneously on one machine, similar to a tablet grinder. The wafer's two polishing pads are placed in opposite directions so that when the wafer is pushed toward the top in one direction and toward the bottom in the opposite direction, the resulting stresses cancel each other out. This is beneficial to prevent the silicon wafer from being pushed against the rigid carrier and causing damage to the edge of the silicon wafer. ? Except for many loads on the edge of the wafer, it is unlikely that the edge will be damaged when the wafer is running with the carrier.

Polished (Class ≤1k)

The purpose of wafer polishing is to obtain a very smooth, flat, and damage-free silicon surface. The polishing process is similar to the grinding process, but the basis of the process is different. When grinding, the silicon wafer is mechanically ground; when polishing, it is a chemical/mechanical process. This difference in principle of operation is what causes polishing to produce smoother surfaces than abrasive discs.

During polishing, chemical/mechanical polishing is performed on silicon wafers with special polishing pads and special polishing sands. The polishing surface of the silicon wafer is rotated, under a certain pressure, and covered with abrasive sand on the pad. Polishing sand consists of silica gel and a special high pH chemical. This high pH chemical oxidizes the surface of the silicon wafer and mechanically removes the oxide layer from the surface with a polishing sand containing silica gel.

Silicon wafers are usually polished in multiple steps. The first step is rough polishing, with a harder pad, the polishing sand is more reactive to it, and has more coarse silica particles than the sand used in subsequent polishing. The first step is to remove corrosion spots and some mechanical damage. For the next polishing, use a soft-lined, polishing sand with fewer chemicals and finer silica particles. The final polish that removes residual damage and mist is called fine polish.

Cleaning before inspection (class 10)

After the silicon wafer is polished, there is a lot of contamination on the surface, most of which are particles from the polishing process. The polishing process is a chemical/mechanical process that concentrates a large number of particles. In order to be able to inspect the wafers, cleaning is performed to remove most of the particles. Through this cleaning, the cleanliness of the silicon wafer still cannot meet the customer's requirements, but it can be checked.

The usual cleaning method is to use RCA SC-1 cleaning solution after polishing. Sometimes it is more effective to use magnetic ultrasonic cleaning when cleaning with SC-1. Another method is to first wash with H2SO4/H2O2 and then HF. In contrast, this method is more effective in removing metal contamination.

an examination

After polishing and cleaning, it is ready for inspection. During the inspection process, resistivity, warpage, total thickness tolerance and flatness are all tested. All these measurement parameters are tested in a non-contact method so that the polished surface is not damaged. At this point, the silicon must ultimately meet the customer's size performance requirements or it will be obsolete.

Metal removal cleaning

After the wafer is inspected, a final cleaning is performed to remove any particles remaining on the wafer surface. The main contaminants are metal ions that remain on the wafer surface after cleaning before inspection. These metal ions come from various processes that use metal in contact with silicon wafers, such as slicing and grinding. Some metal ions even come from the chemicals used in the previous cleaning processes. Therefore, the final cleaning is mainly to remove the metal ions remaining on the surface of the silicon wafer. The reason for this is that metal ions can cause minority carrier lifetimes, which can degrade device performance. SC-1 standard cleaning solution is not very effective in removing metal ions. Therefore, a different cleaning solution, such as HCl, must be used.

wipe

After cleaning the wafer with HCl, some particles may still be adsorbed on the surface. Some manufacturers choose brushes made from PVA to remove these residual particles. During the scrubbing process, pure water or ammonia (NH4OH) should flow over the wafer surface to carry away the adhered particles. Wiping with PVA is an effective means of removing particles.

laser inspection

After the final cleaning of the silicon wafer is completed, it is necessary to inspect the surface particles and surface defects. Laser inspectors detect surface particles and defects. Because the laser is a high-intensity wave source in the short wave. The laser is reflected on the surface of the silicon wafer. If there is no problem with the surface, light hitting the surface of the silicon wafer will be reflected at the same angle. However, if the light hits a particle or hits a rough surface, the light will not reflect at the same angle. The reflected light travels in all directions and can be detected at different angles.

Packing/Shipping

Nevertheless, the packaging of silicon wafers is very important, which may not have been considered very thoughtfully. The purpose of the packaging is to provide a dust-free environment for the silicon wafers and to keep the silicon wafers free from any damage during transportation; the packaging also protects the silicon wafers from moisture. If a good wafer is placed in a container and it is contaminated, it will be as badly contaminated as at any stage in the wafer processing process, or even considered a more serious problem because in the wafer During the production process, as each step is completed, the value of the silicon wafer continues to rise. The ideal packaging is one that provides a clean environment while controlling the tidiness of the small environment during storage and transport. Typical shipping containers are made of polypropylene, polyethylene, or some other plastic material. These plastics should not release any gas and be dust-free so that the wafer surface is not contaminated.

Silicon Wafer Applications

 Chips made of silicon wafers are known as "God Operators", which have amazing computing power. No matter how complex mathematical problems, physical problems and engineering problems are, and no matter how much computing workload is, as long as the staff tell it the problem through the computer keyboard and issue the ideas and instructions for solving the problem, the computer can be used in a very short time. I will tell you the answer. In this way, problems that take years or decades to calculate manually may be solved by a computer in minutes. Even some questions that humans cannot calculate the result of, the computer can quickly tell you the answer.

The chip is again a modern miniature "knowledge base" that has the mythic

al storage capacity to fit a 24-volume Encyclopaedia Britannica on a pinpoint-sized silicon chip. Today, there are more than 30 million kinds of books and magazines in the world, and more than 500,000 kinds are added every year. German futurist Beinhauer pointed out: "Scientists today, even if they work all day and night, can only read 5% of all publications in their profession." What is the way out? The only way is for each library and information center to store all kinds of information in silicon memory and connect them into a network with communication lines. In this way, when scientific and technical personnel want to find some kind of information and data, as long as they sit in the office and operate the computer keyboard, the content to be queried will be displayed on the computer screen immediately.

Microelectronic chips have entered the field of medicine, rejuvenating the ancient medicine and creating brilliance for human health care.

The "magic" of the microelectronic chip is that it can restore sight to the blind, deaf and deaf, speech to the dumb, and motion of prosthetic limbs, bringing light and hope to tens of millions of disabled people around the world.

The power of microelectronics in aerospace, defense, and industrial automation is a well-known fact. Under the control of large electronic computers, unmanned aircraft can fly freely in the blue sky; artificial satellites, spacecraft, and space shuttles can accurately lift off, fly, locate, and automatically send back various information to the ground. Under the command of the electronic computer, artillery and missiles can be fired without missing a shot, hit the target accurately, and even hit the fast-moving target in the air, including the enemy's missile in flight. Computers and various sensing technologies are widely used in the industry, which can save manpower, improve the degree of automation and processing accuracy, and greatly improve labor productivity. Robots have appeared in many industrial fields. They not only work hard, but also work fast and with high precision. They can even charge into battle in some high-temperature, underwater and dangerous sections. As they move forward, intelligent robots have begun to show their extraordinary skills. Effective organization and strong shooting awareness are applauded. Beat the world's number one super chess master. Its wonderful performance shows that intelligent computer has developed to a new stage.

How to clean silicon wafers

 

In the production of semiconductor devices, silicon wafers must be strictly cleaned. Trace contamination can also cause device failure. The purpose of cleaning is to remove surface contamination impurities, including organic and inorganic substances. Some of these impurities exist on the surface of the silicon wafer in the form of atoms or ions, and some in the form of thin films or particles. Organic contamination includes photoresist, organic solvent residues, synthetic waxes, and grease or fibers from human contact with devices, tools, and utensils. Inorganic pollution includes heavy metal gold, copper, iron, chromium, etc., which seriously affects the minority carrier lifetime and surface conductance; alkali metals such as sodium cause serious leakage; particle pollution includes silicon slag, dust, bacteria, microorganisms, organic colloidal fibers, etc. , will lead to various defects. There are two ways to remove pollution: physical cleaning and chemical cleaning.

Classification

physical cleaning

There are three methods of physical cleaning. ①Brushing or scrubbing: It can remove particle contamination and most films that stick to the film. ②High pressure cleaning: The surface of the film is sprayed with liquid, and the pressure of the nozzle is as high as several hundred atmospheres. High-pressure cleaning relies on jetting, and the film is not prone to scratches and damage. However, high-pressure spraying will generate static electricity, which can be avoided by adjusting the distance and angle of the nozzle to the film or adding antistatic agent. ③Ultrasonic cleaning: Ultrasonic sound energy is introduced into the solution, and the contamination on the film is washed away by cavitation. However, it is more difficult to remove particles smaller than 1 micron from patterned wafers. Increase the frequency to the ultra-high frequency band, and the cleaning effect is better.

chemical cleaning

Chemical cleaning is to remove invisible pollution of atoms and ions. There are many methods, such as solvent extraction, pickling (sulfuric acid, nitric acid, aqua regia, various mixed acids, etc.) and plasma method. Among them, the hydrogen peroxide system cleaning method has good effect and little environmental pollution. The general method is to first clean the silicon wafer with an acid solution with a composition ratio of H2SO4:H2O2=5:1 or 4:1. The strong oxidizing property of the cleaning solution decomposes and removes the organic matter; after rinsing with ultrapure water, use an alkali with a composition ratio of H2O:H2O2:NH4OH=5:2:1 or 5:1:1 or 7:2:1 Due to the oxidation of H2O2 and the complexation of NH4OH, many metal ions form stable soluble complexes and dissolve in water; then use the composition ratio of H2O:H2O2:HCL=7:2:1 or 5 :2:1 acidic cleaning solution, due to the oxidation of H2O2, the dissolution of hydrochloric acid, and the complexation of chloride ions, many metals generate complex ions that dissolve in water, so as to achieve the purpose of cleaning.

Radiotracer atomic analysis and mass spectrometry analysis showed that the hydrogen peroxide system had the best cleaning effect, and all the chemical reagents H2O2, NH4OH, and HCl could be completely volatilized. When cleaning silicon wafers with H2SO4 and H2O2, sulfur atoms of about 2×1010 atoms per square centimeter will be left on the surface of silicon wafers, which can be completely removed by the latter acid cleaning solution. Using H2O2 system to clean silicon wafers has no residue and is less harmful, which is also beneficial to workers' health and environmental protection. After each step of cleaning solution in wafer cleaning, rinse thoroughly with ultrapure water.

Problems that cause bad silicon

 There are many reasons, but there are few real technical reasons, mainly because the factors that are considered are more likely to cause more missing corners (including many workshops, such as cleaning, inspection, etc.).

Hidden cracks: incoming material, pre-cleaning, inserting, cleaning, pulling, sorting; chipping: C angle, rubber surface, processing, handling; Highlights: impurities; burrs: handling, processing. In the manufacturing process of solar cells, the surface of monocrystalline silicon is produced with sodium hydroxide and isopropanol, and what is the reason? How can we handle it? Generally speaking, the organic matter is not thoroughly cleaned! The second is that the sodium hydroxide is not cleaned!

What are the reasons for the linear slope of silicon wafers? What are the reasons for the linear slope of silicon wafers?

1. The line speed cannot be lower than or exceed the cutting capacity of the mortar. If it is lower than the cutting capacity of the mortar, there will be line marks or even broken lines; on the contrary, if the cutting capacity of the mortar is exceeded, it may cause the mortar flow to fail to keep up, resulting in thick flakes or even line marks, etc.

 2. Mortar flow should be sufficient

 3. Tension of steel wire

What are the possible reasons for the line marks on the silicon wafer? What are the possible reasons for the line marks on the silicon wafer? It depends on the specific occurrence and the direction of the silicon wafer line marks: the main influences are uneven particles of the mortar, jumpers, grooves in the main wheel and debris in the mortar.

 1. The raw material - the silicon block itself has defects such as impurities, which cause the density of the silicon block to be inconsistent or uneven distribution, which is easy to cause line marks;

2. Excipients - The quality of the excipients is not good, such as the wrong material, impurities, etc. In addition, there may be too many repeated use of the excipients;

3. Equipment - the parameters of the equipment should not be the same version, and should be different from machine to machine;

4. Human - the most likely factor, caused by intentional or unintentional or negative work. But at present, line marks are a common phenomenon in most companies. The line mark ratio mainly reflects the level of line cutting and the rate of film formation.

Line marks can be reduced in many ways:

1. Raw materials Start with inspection after prescribing, and control the flow of silicon blocks that may lead to line marks into the wire cutting process.

3. Equipment, perfect maintenance mechanism, unique process formula

4. Personnel consider reducing the line mark rate from a positive aspect. For example, the reward mechanism replaces the punishment mechanism. The main reason is the enthusiasm of the personnel. After all, people play a leading role in production. Complete data and anti-fraud systems, such as the support of major data programs and anti-fraud systems, in the final analysis, the key lies in human process equipment operation data, etc., all need to rely on people to complete dense wiring traces: dense wiring traces are the problem of mortar, and the cutting ability of mortar Low, to solve this problem, you can adjust the cutting speed a little slower, and be more detailed on the slurry problem. Increase the stirring time a bit. This problem can be solved completely. The reason for the pattern of wafer cleaning is that too much IPA has been added, and the time of making silk is too long, so KOH or NAOH needs to be added.

After the silicon wafer is cleaned, the surface is stained, and at a fixed position on the edge of one side, it may... After the silicon wafer is cleaned, there is a stain on the surface, and at a fixed position on the edge of one side, it may be...

There are several possibilities!

1. There is a problem with the previous project, that is, the mud cleaning during wire cutting.

2. Attention should be paid to the cleaning of silicon wafers. Before cleaning, you should be able to see the dirty, insert the dirty side up, extend the ultrasonic time a little, and add lactic acid in the cleaning machine! It should be fine!

Silicon Wafer Process--Challenges

 Cutting line diameter

Thinner dicing lines mean lower kerf losses, which means more wafers can be produced from the same block. However, the cut line is thinner and more prone to breakage.

load

The total area of ​​each cutting is equal to the area of ​​the silicon wafer X the number of silicon blocks cut each time X the number of silicon wafers cut from each silicon block.

cutting speed

The speed at which the cutting table cuts the web through the wire depends largely on the wire movement speed, motor power and wire pull.

Ease of Maintenance

Wire saws require changing the cutting wire and slurry between cuts, and the faster the maintenance, the higher the overall productivity.

Producers must balance these interrelated factors to maximize productivity. Higher cutting speeds and higher loads will increase the pulling force of the cutting wire, increasing the risk of wire breakage. Since all the silicon wafers on the same silicon block are cut at the same time, as long as one cutting line breaks, all the partially cut silicon wafers have to be discarded. However, it is also not advisable to use thicker and stronger dicing lines, which reduces the number of wafers produced per dicing and increases the consumption of silicon raw materials.

Wafer thickness is also a factor that affects productivity, as it relates to the number of wafers produced per block. Ultra-thin silicon wafers present additional challenges for wire saw technology, as its production process is much more difficult. In addition to the mechanical brittleness of the silicon wafer, if the wire sawing process is not precisely controlled, fine cracks and bends can negatively impact product yield. Ultra-thin wafer wire saw systems must provide precise control over process linearity, cutting line speed and pressure, and cutting coolant.

Regardless of the thickness of the silicon wafer, crystalline silicon photovoltaic cell manufacturers have put forward extremely high requirements on the quality of the silicon wafer. Silicon wafers must be free of surface damage (fine cracks, wire saw marks), topographical defects (bending, bumps, uneven thickness) should be minimized, and the requirements for additional back-end processing such as polishing should be minimized.

Wafer grade classification and standard

 1）.First-class products (Class I tablets)

1. Physical and chemical properties ①Model: P crystal orientation <100>±1°; 18 3 ②Oxygen content: ≤1.0×10 at/cm; 16 3 ③Carbon content: ≤5×10 at/cm; ④Minority carrier lifetime :τ=1.3-3.0μs (data of bare chip under test voltage ≥20mv); ⑤Resistivity: 0.9-1.2, 1.2-3.0, 3.0-6.0Ω·cm; 2 ⑥Dislocation density: ≤3000 pieces/cm ; 2. Geometric dimensions ①Side length: 125×125±0.5mm; ②Diagonal: 150×150±0.5mm; ③Concentricity: the difference between the chord lengths of any two arcs ≤1mm; ④Perpendicularity: the clamp on any two sides Angle 90°±0.3°; ⑤Thickness: 200±20μm; (thickness at center point≥195μm, thickness at four points at the edge≥180μm) 180±20μm; (thickness at center point≥175μm, thickness at four points at edge≥160μm) ⑥TTV: ≤30μm; ⑦Curvity: ≤40μm; 3. Surface indicators ①Line marks: no visual marks; ②Visual surface: no contamination, no water stains, dyeing, white spots, fingerprints, etc.; ③No chipping, no Visual cracks, smooth edges, no warping visually;

2）. Qualified products (Class II tablets)

1. Physical and chemical properties ①Model: P crystal orientation<100>±1°; ②Oxygen content: ≤1.0×1018at/cm3; ③Carbon content: ≤5×1016at/cm3; ④Minority carrier lifetime: τ=1.0-1.2μs (Data of bare chip under test voltage ≥20mv); ⑤Resistivity: 0.5-0.8Ω·cm; ⑥Dislocation density: ≤3000 pieces/cm2; 2. Geometric dimension ①Side length: 125×125±0.5mm; ②Diagonal: 150×150±0.5mm; ③Concentricity: The difference between the chord lengths of any two arcs ≤1.5mm; ④Perpendicularity: The angle between any two sides is 90°±0.3°; ⑤Thickness: 200±20μm;( Thickness at center point≥195μm, thickness at four edge points≥180μm) 180±20μm; (thickness at center point≥175μm, thickness at four edge points≥160μm)

⑥TTV: ≤30μm; ⑦Bending degree: ≤40μm; 3. Surface indicators ①Line marks: no obvious line marks, no bumps when touched. ② Range of edge collapse: edge collapse is not "V" shape, length × depth ≤ 1 × 0.5mm, number ≤ 1 piece/piece; no visible cracks, smooth edges, no warping visually;

3）.Other products (Class III tablets)

1. Physical and chemical properties ①Model: PN crystal orientation <100>±3°; ②Oxygen content: ≤1.0×1018at/cm3; 16 3 ③Carbon content: ≤5×10 at/cm; ④Minority carrier lifetime: τ＜ 1.0μs (data of bare chip under test voltage ≥20m); ⑤Resistivity: ≤0.5Ω·cm; ⑥Dislocation density: >3000 pieces/cm2; 2. Geometry ①Side length: 125×125±1.0mm ; ②Diagonal: 150×150±1.0mm; ③Concentricity: the difference between the chord lengths of any two arcs ≤1.5mm; ④Perpendicularity: the angle between any two sides is 90°±0.5°; ⑤Thickness: <160μm 3. Surface indicators ① There are obvious line marks, and the touch has a bumpy feeling.

Note: As long as it meets any one of the third "extraordinary products (Class III tablets)", it will be judged as a non-conforming product.